The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2006

Filed:

Jul. 29, 2002
Applicants:

Shay Kastoriano, Moshav Rinatia, IL;

Moshe Hershkovich, Tel-Aviv, IL;

Guy Itzkovsky, Ramat-Hasharon, IL;

Mor Levi, Ramat-Gan, IL;

Eyal Shachrai, Netanya, IL;

Yoram Stern, Raanana, IL;

Moshe Stark, Even Yehuda, IL;

Inventors:

Shay Kastoriano, Moshav Rinatia, IL;

Moshe Hershkovich, Tel-Aviv, IL;

Guy Itzkovsky, Ramat-Hasharon, IL;

Mor Levi, Ramat-Gan, IL;

Eyal Shachrai, Netanya, IL;

Yoram Stern, Raanana, IL;

Moshe Stark, Even Yehuda, IL;

Assignee:

Hy Wire Ltd., Netanya, IL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and system for storing arranged data in a memory, the system including: (a) a plurality of random access memories, each random access memory (RAM) of the plurality including: (i) a first array of cells, the first array having at least two dimensions and having rows and columns, the first array designed and configured to contain a plurality of key entries, each of the cells having a unique address including a row index and a column index, each of the key entries for matching with an input key, and (b) a processor designed and configured to search the plurality of key entries for a match, in response to the input key, the plurality of RAMs designed and configured such that: (i) at least one row in a second of the RAMs has a row index that is identical to a row index in a first of the RAMs, and (ii) the key entries are arranged within each of the plurality of RAMs in monotonic order.


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