The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2006

Filed:

Jun. 30, 2004
Applicants:

Jin-hong Ahn, Ichon-shi, KR;

Sang-hoon Hong, Ichon-shi, KR;

Sang-don Lee, Ichon-shi, KR;

Yil-wook Kim, Ichon-shi, KR;

Young-jun Park, Ichon-shi, KR;

Inventors:

Jin-Hong Ahn, Ichon-shi, KR;

Sang-Hoon Hong, Ichon-shi, KR;

Sang-Don Lee, Ichon-shi, KR;

Yil-Wook Kim, Ichon-shi, KR;

Young-Jun Park, Ichon-shi, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A driving circuit for use in a non-volatile dynamic random access memory (NVDRAM) having a nonconductor which can trap electrons or holes includes an internal supply voltage generator for generating the plurality of internal supply voltages, each having at least two different voltage levels; a mode controller for determining an operation mode of the NVDRAM; a voltage level selector for selecting one voltage level of each internal supply voltage in response to the operation mode to thereby outputs the selected voltage level of each internal supply voltage to the row decoding block and the core area; a row decoding block for receiving the internal supply voltages and outputting the internal supply voltages in response to an inputted address; and a core area having a plurality of unit cells, each storing a data, for accessing the data in response to inputted voltage levels of the plurality of internal supply voltages.


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