Structure to reduce signal cross-talk through semiconductor substrate for system on chip applications

Abstract

A structure that reduces signal cross-talk through the semiconductor substrate for System-On-Chip (SOC) () applications, thereby facilitating the integration of digital circuit blocks () and analog circuit blocks () onto a single IC. Cross-circuit interaction through a substrate () is reduced by strategically positioning the various digital circuit blocks () and analog circuit blocks () in an isolated wells (), (), () and () over a resistive substrate (). These well structures (), (), (), and () are then surrounded with a patterned low resistivity layer () and optional trench region (). The patterned low resistivity region () is formed below wells () and () and functions as a low resistance AC ground plane. This low resistivity region () collects noise signals that propagate between digital circuit blocks () and analog circuit blocks ().