The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 23, 2006

Filed:

Feb. 27, 2004
Applicants:

Promod Kumar, Motta S. Anastasia, IT;

Francesco Tomaiuolo, Monte Sant'Angelo, IT;

Pierpaolo Nicosia, Catania, IT;

Luca Giuseppe DE Ambroggi, Catania, IT;

Francesco Pipitone, Palermo, IT;

Inventors:

Promod Kumar, Motta S. Anastasia, IT;

Francesco Tomaiuolo, Monte Sant'Angelo, IT;

Pierpaolo Nicosia, Catania, IT;

Luca Giuseppe De Ambroggi, Catania, IT;

Francesco Pipitone, Palermo, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza, IT;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An Electric Wafer Sort (EWS) flow is implemented by expanding the functions of the micro-controller embedded in a FLASH EPROM memory device and of the integrated test structures. Test routines are executed by the onboard micro-controllers (that may be reading either from an embedded ROM or from a GLOBAL CACHE provided) internally without involving any external complex or expensive test equipment to control the test program. The device architecture is transparent from a tester point of view, with a standard interface having a set of defined commands and instructions to be interpreted by the on board microcontroller and internally executed.


Find Patent Forward Citations

Loading…