Flash memory program control circuit and method for controlling bit line voltage level during programming operations

Abstract

Provided are a program control circuit for flash memory devices and a control method utilizing such a circuit for controlling the bit line voltage level during programming operations for flash memory devices that include memory cells arranged in the form of a matrix, in which each of the memory cells is connected to a word line, a bit line, and a source line and which provides a program current to the bit line. The program control circuit includes a voltage level sensing control portion, a switching control portion, a current sink and a switching circuit. The voltage level sensing control portion is enabled or disabled in response to a first program control signal and compares the voltage of a bit line connected to a memory cell being programmed with a reference voltage and outputs a voltage control signal corresponding to the result of the comparison. The switching control portion outputs a switching bias signal in response to the voltage control signal and a second program control signal. The current sink provides a predetermined current to a ground voltage in response to a reference bias signal. The switching circuit, which is connected between the bit line and the current sink, is turned on or off in response to the switching bias signal.