The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2006

Filed:

Nov. 13, 1998
Applicants:

Thanh T. Tran, Houston, TX (US);

Michael P. Moriarty, Spring, TX (US);

Giang H. Dao, Houston, TX (US);

Inventors:

Thanh T. Tran, Houston, TX (US);

Michael P. Moriarty, Spring, TX (US);

Giang H. Dao, Houston, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 7/01 (2006.01); G06F 13/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

A digital television/local bus interface logic supports handling of digital television (DTV) data with non-tearing. The interface logic provides a dual frame buffer DTV architecture in which a pair of DTV/local bus frame buffers alternate functions: one frame buffer stores incoming DTV data and the other frame buffer stores the outgoing DTV data. When a refresh of a display device reaches a programmed position of the display device, the interface logic determines which frame buffer is being updated by the incoming DTV data. The outgoing DTV data is then read from an opposite frame buffer and transmitted to the display device. The interface logic receives a horizontal sync signal and a vertical sync signal from the graphics controller for monitoring refresh of the display device. The interface logic also provides an architecture for transferring decoded DTV data over a local bus to the graphics controller.


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