The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2006

Filed:

Mar. 30, 2004
Applicants:

Robert C. Taft, Munich, DE;

Christopher A. Menkus, Munich, DE;

Maria R. Tursi, Munich, DE;

Ols Hidri, Munich, DE;

Andreas Tuechler, Boeblingen, DE;

Valerie Pons, Munich, DE;

Inventors:

Robert C. Taft, Munich, DE;

Christopher A. Menkus, Munich, DE;

Maria R. Tursi, Munich, DE;

Ols Hidri, Munich, DE;

Andreas Tuechler, Boeblingen, DE;

Valerie Pons, Munich, DE;

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M 1/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

An ADC circuit includes a multiplexer, a calibration circuit, one or more ADC banks, and a calibration ladder, all on an integrated circuit. The calibration resistor ladder is enabled during a calibration phase, and disabled during normal operation. When enabled, the calibration resistor ladder provides a calibration reference signal. Also, the multiplexer provides the calibration reference signal to one or more ADC banks during a calibration phase, and provides an analog input signal to the ADC banks otherwise. The calibration circuit is arranged to provide one or more adjustment signals to the ADC banks to calibrate the ADC banks in response to one or more comparator output signals from the ADC banks.


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