The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 16, 2006
Filed:
Jun. 15, 2005
Jeffrey Tyhach, Sunnyvale, CA (US);
Bonnie Wang, Cupertino, CA (US);
Chiakang Sung, Milpitas, CA (US);
Khai Nguyen, San Jose, CA (US);
Jeffrey Tyhach, Sunnyvale, CA (US);
Bonnie Wang, Cupertino, CA (US);
Chiakang Sung, Milpitas, CA (US);
Khai Nguyen, San Jose, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
Input buffer circuitry for handling high-speed differential input signals on an integrated circuit is provided. The input buffer circuitry may use two parallel differential input buffers with overlapping input-voltage ranges. Logic on the integrated circuit may be powered at a core-logic power supply voltage. Input-output circuitry on the integrated circuit may be powered at an input-output voltage level. To improve the performance of the input buffers in the overlap range, at least one the input buffers can be powered using a total power supply voltage drop that exceeds the core-logic power supply level. One of the input buffers may be configured to handle lower-voltage input signals. This input buffer may be powered using the input-output power supply level.