The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2006

Filed:

Mar. 03, 2004
Applicants:

Shih-lun Chen, Hsinchu, TW;

Ming-dou Ker, Hsinchu, TW;

Inventors:

Shih-Lun Chen, Hsinchu, TW;

Ming-Dou Ker, Hsinchu, TW;

Assignee:

ADMtek Incorporated, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

An output buffer circuit with low-voltage devices to driver high-voltage signals for PCI-X applications is proposed. Because power supply voltage of PCI-X is at 3.3V, the high-voltage gate-oxide stress is a serious problem to design PCI-X I/O circuit in a 0.13 μm 1V/2.5V CMOS process with only low-voltage gate oxide. This proposed output buffer circuit can be operated at 133 MHz in 3.3V PCI-X environment without causing high-voltage gate-oxide reliability problem. In this design, the circuit is implemented in a 0.13 μm 1V/2.5V CMOS process and the output signal swing can be 3.3V. Besides, a level converter that converts 0V˜1V voltage swing to 1V˜3.3V voltage swing is also presented.


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