The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2006

Filed:

Jul. 23, 2004
Applicants:

Tai-an Chao, San Jose, CA (US);

Zicheng Gary Ling, San Jose, CA (US);

Shihcheng Hsueh, Fremont, CA (US);

Inventors:

Tai-An Chao, San Jose, CA (US);

Zicheng Gary Ling, San Jose, CA (US);

Shihcheng Hsueh, Fremont, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/26 (2006.01);
U.S. Cl.
CPC ...
Abstract

A test arrangement is designed to test whether one in a chain of vias or contacts has abnormally high resistance. The arrangement contains a plurality of via or contact chains and a plurality of decoders. The chains are switchably connected to a resistance measurement device. Each decoder has a unique address such that it will generate a control signal when a predetermined address is address thereon. The control signal is used to close a switch, which connect one of the chains to the resistance measurement device. By sequentially applying different addresses to the decoders, the resistance of the chains can be individually measured.


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