The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7043515 B1

PDF
Full Text
Expired
Date of Patent:
May. 09, 2006

Filed:

Sep. 03, 2003
Applicant:

Mihailo M. Stojancic, Cary, NC (US);

Inventor:

Mihailo M. Stojancic, Cary, NC (US);

Assignee:

ISIC Corporation, Cary, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/72 (2006.01);
U.S. Cl.
CPC ...
Abstract

Techniques are provided for performing modular arithmetic on a key composed of many bits. One circuit implementation includes a distributor, one or more lookup tables and a plurality of adders. The distributor segments the key into a plurality of partitions. Each partition is based on a polynomial expression corresponding to a fixed size key. Each of the bits contained within the partitions are routed on a partition basis to one or more lookup tables, the routed bits acting as indices into the one or more tables. The lookup tables store precomputed values based upon the polynomial expression. The outputted precomputed values from one or more lookup tables are outputted to the plurality of adders. The plurality of adders add the bits from a portion of the routed partitions and the outputted precomputed values from the one or more lookup tables to form the binary residue.


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Stojancic, Mihailo. (2006). Methods and apparatus for modular reduction circuits (U.S. Patent No. 7043515). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7043515

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