The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 09, 2006
Filed:
Mar. 10, 2004
Shoichi Furuhata, Nagano, JP;
Shoichi Furuhata, Nagano, JP;
Abstract
A semiconductor wafer is disclosed in which a high concentration impurity layer is formed in a semiconductor wafer to a predetermined depth, in order to electrically connect electrodes formed on the principal face of the wafer without forming trenches and through holes in the wafer. An ndiffusion region is formed in the dicing region of a semiconductor wafer by ion implanting or diffusion. The diffusion region extends to an nlayer formed deep in the semiconductor wafer. The width of the ndiffusion region is made wide enough to account for the blade width of a dicer, so that an ndiffusion region remains at the outer periphery of each of the chips divided by the dicing operation. Bump electrodes on the wafer surface electrically connect with the nlayer deep in the semiconductor through the ndiffusion region.