The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2006

Filed:

Feb. 01, 2005
Applicants:

Hsi-ming Chang, Taoyuan, TW;

Chia-nan Shen, Taipei, TW;

Inventors:

Hsi-Ming Chang, Taoyuan, TW;

Chia-Nan Shen, Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/84 (2006.01);
U.S. Cl.
CPC ...
Abstract

A thin film transistor includes a substrate, a polysilicon layer, a patterned gate dielectric layer, a gate layer, a channel region, a source region, a drain region, and a LDD region. The polysilicon layer is positioned over the substrate. The patterned gate dielectric layer is positioned over the polysilicon layer. The patterned gate dielectric layer has a third and a fourth portion, wherein the fourth portion has a thickness smaller than that of the third portion. The gate layer is positioned over the third portion. The source region and the drain region are positioned in the polysilicon layer under the fourth portion. The channel region is positioned in the polysilicon layer under the gate layer. The LDD region is positioned in the polysilicon layer under the third portion and is between the channel region and the source region or between the channel region and the drain region.


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