The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 02, 2006
Filed:
May. 28, 2003
Eric John Hewitt, Pullman, WA (US);
Alan Robert Danielson, Moscow, ID (US);
Peter Sean Ladow, Redmond, WA (US);
Tom Leroy Hansen, Pullman, WA (US);
Eric John Hewitt, Pullman, WA (US);
Alan Robert Danielson, Moscow, ID (US);
Peter Sean Ladow, Redmond, WA (US);
Tom Leroy Hansen, Pullman, WA (US);
Comtech Telecommunications Corp., Melville, NY (US);
Abstract
A method and apparatus for decoding a linear block encoded string of information bits comprising: converting the string into a plurality of codewords. Performing hard and soft decisions on each codeword to generate a hard and soft decision vector. Computing the syndrome and finding the location of the two minimum values by Galois Field Arithmetic. Designating these values LOWand LOWand xoring with a Ncthus generating NcSwapping Ncwith Ncand determining the lowest soft decision value, Minand a next lowest value, MinThe two bit locations creating Minare designated as MinA and MinB. MinA being replaced with Minminus the value MinA. MinB being replaced with Minminus the value at MinB. Generating an output codeword by subtracting Minfrom all other bit locations values and 2's complementing all soft values with 0 in their location. Creating the new soft value vector. Some embodiments include a system and method that organizes an encoded codeword. The encoded codeword has several codeword bits. The method receives the encoded codeword, assigns multiple codeword bits to at least one memory address in a plurality of memory addresses, and iteratively decodes the received codeword by utilizing the plurality of memory addresses in a predetermined order. The predetermined order is based on a dimension of the received codeword.