The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 02, 2006
Filed:
Jul. 18, 2003
Peyman Hadizad, Scottsdale, AZ (US);
Peyman Hadizad, Scottsdale, AZ (US);
Semiconductor Components Industries, L.L.C., Phoenix, AZ (US);
Abstract
In one embodiment, a dc/dc converter network () is described. The converter network () includes at least one GaAs depletion mode or normally on FET device (). The converter network () is a two-port system having a positive input terminal (), a positive output terminal (), and a negative input terminal () connected to a negative output terminal (). A first GaAs depletion mode FET () is connected between the positive input terminal () and an internal node (). A second GaAs depletion mode FET () is connected between the internal node () and the common negative terminals (). A control circuit () is connected gate leads of the two FETs (), to alternatively switch the devices from a current conducting mode to a current blocking mode. An inductor () is connected between the internal node () and the positive output terminal (). The GaAs depletion mode devices provide a converter network with improved performance.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile