The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 02, 2006
Filed:
Mar. 22, 2002
Kenichi Yanai, Kawasaki, JP;
Yoshio Nagahiro, Kawaski, JP;
Kazushige Hotta, Kawasaki, JP;
Koji Ohgata, Sagamihara, JP;
Yasuyoshi Mishima, Kawasaki, JP;
Nobuo Sasaki, Kawasaki, JP;
Kenichi Yanai, Kawasaki, JP;
Yoshio Nagahiro, Kawaski, JP;
Kazushige Hotta, Kawasaki, JP;
Koji Ohgata, Sagamihara, JP;
Yasuyoshi Mishima, Kawasaki, JP;
Nobuo Sasaki, Kawasaki, JP;
Fujitsu Display Technologies Corporation, Kawasaki, JP;
Abstract
In a case of a liquid crystal display apparatus, a gate insulating film of a TFT driven at a low voltage (3.3 V or 5 V) is constituted by one insulating film, and a thickness thereof is set to, for example, 30 nm. This TFT has a structure in which LDD regions (low concentration impurity regions) are not provided. A TFT having a CMOS structure, which is driven at a high voltage (18 V), has a gate insulating film constituted by two insulating films having a thickness of, for example, 130 nm in total. In an n-type TFT, a low concentration impurity region is provided on a drain side. A p-type TFT has a structure having no LDD region. A pixel TFT has a gate insulating film constituted by two insulating films, and LDD regions provided in both of its source/drain.