The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 25, 2006

Filed:

Oct. 28, 2003
Applicants:

Masatoshi Shinagawa, Otsu, JP;

Akifumi Kawahara, Uji, JP;

Tetsuyuki Fukushima, Nishinomiya, JP;

Masakazu Kurata, Osaka, JP;

Manabu Komiya, Kyoto, JP;

Inventors:

Masatoshi Shinagawa, Otsu, JP;

Akifumi Kawahara, Uji, JP;

Tetsuyuki Fukushima, Nishinomiya, JP;

Masakazu Kurata, Osaka, JP;

Manabu Komiya, Kyoto, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 19/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

To provide a nonvolatile memory microcomputer with which a step of testing a microcomputer unit using a logic tester can be omitted, thereby reducing the testing cost. A memory tester supplies test data and expectation data to the nonvolatile memory microcomputer, and the nonvolatile memory microcomputer stores them in a nonvolatile memory. Subsequently, upon receiving an address signal, the nonvolatile memory outputs a test signal and an expectation signal based on test data and expectation data corresponding to the address signal. The test signal is supplied to a circuit block in the microcomputer unit, to drive the circuit block. The circuit block returns a test result signal, which is output to the memory tester together with the expectation signal. The memory tester compares the test result signal and the expectation signal, to judge whether the microcomputer unit operates correctly.


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