The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7035158 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 25, 2006

Filed:

Nov. 26, 2003
Applicant:

Eiji Kozuka, Tokyo, JP;

Inventor:

Eiji Kozuka, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A fault after an assembling process is saved by using a tester. An error detector circuit compares read data from a memory cell and data from an external input/output terminal by means of a comparator circuit, thereby determining whether a memory cell is good or faulty. The error detector circuit outputs a sense signal COMPERR in the case where the memory cell is faulty. A self fuse program circuit causes a latch circuit LAi to latch an external address as a save address upon receipt of the sense signal COMPERR. By a counter Ci and a switch circuit SW, programming of a save address is carried out by transferring the save address latched at the latch circuit LAi to a fuse program circuit FPi on one bit by one bit basis.


Find Patent Forward Citations

Kozuka, Eiji. (2006). Semiconductor memory with self fuse programming (U.S. Patent No. 7035158). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7035158

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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