The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 25, 2006
Filed:
Jun. 04, 2004
Chien-chia Huang, ZhuBei, TW;
Yu-wen Tsai, Hsinchu, TW;
Chien-Chia Huang, ZhuBei, TW;
Yu-Wen Tsai, Hsinchu, TW;
Faraday Technology Corp., Hsinchu, TW;
Abstract
A method for placing decoupling capacitors in an integrated circuit during placement and routing stage. In the placement method, a floor plan of the integrated circuit is created, and includes the relative locations of a plurality of functional units. A power mesh comprising a plurality power lines is then overlaid on the floor plan, and the floor plan is divided into a plurality of windows. A plurality of semiconductor cells are placed into a portion of the windows. It is then determined whether a residual area comprising two adjacent windows without functional units and semiconductor cells disposed therein and at least three parallel power lines running theretrough exists. A MOS capacitor is then placed in the detected residual area, serving as a decoupling capacitor.