The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2006

Filed:

Dec. 23, 2002
Applicants:

Paul L. Rogers, Fort Collins, CO (US);

Robert F. Krick, Fort Collins, CO (US);

Vipul Gandhi, Fort Collins, CO (US);

Inventors:

Paul L. Rogers, Fort Collins, CO (US);

Robert F. Krick, Fort Collins, CO (US);

Vipul Gandhi, Fort Collins, CO (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/12 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory architecture with a multiple cache coherency includes at least one processor with a storage area in communication with a cache memory. A main bus transmits and receives data to and from the cache memory and the processor. A coherency control in communication with the cache memory and the processor is configured to determine an existence or location of data in the cache memory or the storage area in response to a data request from the main bus. The coherency control dispatches an existence or location result to the main bus.


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