The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2006

Filed:

Nov. 30, 2001
Applicant:

Peter J. Melsa, Niles, MI (US);

Inventor:

Peter J. Melsa, Niles, MI (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A digital input signal is analyzed by a peak detector () configurable to trigger a first logic signal () if the peak detector detects the digital input signal level crossing a certain threshold. The threshold value can be modified by an overhead. The amplifier () employs a plurality of supply rails of differing voltages () as a function of the logic signals. A digital signal delay element () may delay the signal to allow sufficient time for the amplifier to switch between supply sources. A logic delay element () may delay transmittal of the first logic signal by the peak detector to compensate for signal delay caused by a filter. A hold element () ensures that the first logic signal is applied to the output amplifier for a given amount of time.


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