The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 18, 2006
Filed:
May. 24, 1999
Ching Yu, Santa Clara, CA (US);
Xiaohua Zhuang, Santa Clara, CA (US);
Bahadir Erimli, Campbell, CA (US);
John M. Chiang, San Jose, CA (US);
Shashank Merchant, Sunnyvale, CA (US);
Robert Williams, Cupertino, CA (US);
Edward Yang, San Jose, CA (US);
Chandan Egbert, San Jose, CA (US);
Vallath Nandakumar, Campbell, CA (US);
Ian Lam, Daly City, CA (US);
Eric Tsin-ho Leung, San Jose, CA (US);
Ching Yu, Santa Clara, CA (US);
Xiaohua Zhuang, Santa Clara, CA (US);
Bahadir Erimli, Campbell, CA (US);
John M. Chiang, San Jose, CA (US);
Shashank Merchant, Sunnyvale, CA (US);
Robert Williams, Cupertino, CA (US);
Edward Yang, San Jose, CA (US);
Chandan Egbert, San Jose, CA (US);
Vallath Nandakumar, Campbell, CA (US);
Ian Lam, Daly City, CA (US);
Eric Tsin-Ho Leung, San Jose, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A network switch having switch ports for full-duplex communication of data packets with respective network nodes according to Ethernet (IEEE 802.3) protocol that flexibly assigns memory access slots to access an external memory according to programmable information. A scheduler within an external memory interface assigns the memory access slots to the respective network switch ports according to a programmed sequence written into an assignment table memory from an external programmable data storage device.