The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 18, 2006
Filed:
Aug. 18, 2004
Erik J. Mentze, Moscow, ID (US);
Herbert L. Hess, Moscow, ID (US);
Kevin M. Buck, Pullman, WA (US);
David F. Cox, Tucson, AZ (US);
Erik J. Mentze, Moscow, ID (US);
Herbert L. Hess, Moscow, ID (US);
Kevin M. Buck, Pullman, WA (US);
David F. Cox, Tucson, AZ (US);
Idaho Research Foundation, Inc., Moscow, ID (US);
Abstract
Shifter circuits comprise a matched translation stack comprising at least first and second stacks each of which comprising multiple transistors. The matched translation stack is configured to provide a primary logic level shift between a voltage level away from which a shift is desired (V) and a voltage level to which the shift is desired (V). One or more high voltage buffer stages are provided, at least one of which being connected with and biased by the matched translation stack. At least one high voltage buffer stage comprises multiple transistors arranged in a transistor stack that is biased by the first stack of the matched translation stack, and is connected to receive an input supplied by the second stack of the matched translation stack. The high voltage buffer stage also comprises an inverter that drives an output stage which is also driven by a low voltage buffer stage.