The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2006

Filed:

Mar. 26, 2004
Applicants:

Manabu Ohnishi, Osaka, JP;

Koji Takemura, Osaka, JP;

Noriyuki Nagai, Nara, JP;

Hoyeun Huh, Kyoto, JP;

Tomoyuki Nakayama, Osaka, JP;

Atsushi Doi, Osaka, JP;

Inventors:

Manabu Ohnishi, Osaka, JP;

Koji Takemura, Osaka, JP;

Noriyuki Nagai, Nara, JP;

Hoyeun Huh, Kyoto, JP;

Tomoyuki Nakayama, Osaka, JP;

Atsushi Doi, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01);
U.S. Cl.
CPC ...
Abstract

Input/output cells are formed so as to be peripherally arranged adjacent to a corner cell on a surface of a semiconductor chip, and electrode pads are formed on the respective input/output cells. The electrode pads are configured in a zigzag pad arrangement so as to form inner and outer pad arrays. However, of the electrode pads forming the inner pad array, those electrode pads in predetermined areas adjacent to the two sides of the corner cell are not disposed, such that an interconnect pattern of a carrier which is bump-bonded to the semiconductor chip and vias are prevented from becoming complex.


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