The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 18, 2006
Filed:
Dec. 30, 2003
Cheolsoo Park, Seoul, KR;
Cheolsoo Park, Seoul, KR;
DongbuAnam Semiconductor Inc., Seoul, KR;
Abstract
Methods for manufacturing semiconductor devices are disclosed. In a disclosed method, a first nitride layer and a device isolation oxide layer are etched to thereby expose a portion of a silicon substrate where an active region is to be formed. An epitaxial growth is performed on the active region and a first oxide layer is deposited thereon. Portions of the first oxide layer where a source and a drain are to be formed are etched. The first oxide layer deposited on the portions where the source and the drain are to be formed is then etched. An epitaxial growth is performed on the portions where the source and the drain are to be formed to thereby form the source and the drain. A second nitride layer is deposited thereon. A portion of the first oxide layer located where a gate is to be formed is etched using a gate mask. A third nitride layer is deposited on the source, the drain, and the exposed active region and then etched back to thereby form a nitride layer to control a length of the gate. A gate isolation layer and a gate electrode are sequentially deposited on the active region. A second oxide layer is covered. Finally, a gate electrode plug and a source/drain electrode plug are formed.