The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2006

Filed:

Feb. 04, 2003
Applicants:

Kelvin D. Goveas, Austin, TX (US);

Teik-chung Tan, Austin, TX (US);

Inventors:

Kelvin D. Goveas, Austin, TX (US);

Teik-Chung Tan, Austin, TX (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/52 (2006.01);
U.S. Cl.
CPC ...
Abstract

A multiplier includes a plurality of subunits. Each of the plurality of subunits is configured to perform a portion of a multiplication operation, and the plurality of subunits are coupled together to perform the multiplication operation. At least a first subunit of the plurality of subunits and a second subunit of the plurality of subunits are configured to perform a same portion of the multiplication operation. The first subunit and the second subunit are clocked at a first clock frequency, during use, that is less than a second clock frequency at which a remainder of the plurality of subunits are clocked during use. The first subunit and the second subunit each have inputs coupled to a third subunit of the plurality of subunits to receive multiplication operations to be operated upon by the respective first subunit and second subunit.


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