The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2006

Filed:

Mar. 02, 2004
Applicants:

Roger May, Bicester, GB;

Andrew Crosland, Aylesbury, GB;

Edward Flaherty, Kingston Bagpuize, GB;

Inventors:

Roger May, Bicester, GB;

Andrew Crosland, Aylesbury, GB;

Edward Flaherty, Kingston Bagpuize, GB;

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/177 (2006.01);
U.S. Cl.
CPC ...
Abstract

A programmable logic device is provided with multiple power supplies such that, in one mode of operation, power can be disconnected from at least one part of the programmable logic device, while maintaining power at least to an interface component of the programmable logic device, or to a memory component in which current configuration data are stored, thereby avoiding the need for a configuration sequence when power is reapplied to the whole device. The programmable logic device may be provided as an integrated circuit, having multiple pairs of pins for connection to a supply voltage. Each of the pairs of pins provides power for a different subsection of the programmable logic device.


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