The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2006

Filed:

Jun. 03, 2004
Applicants:

David B. Slater, Jr., Raleigh, NC (US);

Robert C. Glass, Chapel Hill, NC (US);

Charles M. Swoboda, Morrisville, NC (US);

Bernd Keller, Goleta, CA (US);

James Ibbetson, Goleta, CA (US);

Brian Thibeault, Santa Barbara, CA (US);

Eric J. Tarsa, Goleta, CA (US);

Inventors:

David B. Slater, Jr., Raleigh, NC (US);

Robert C. Glass, Chapel Hill, NC (US);

Charles M. Swoboda, Morrisville, NC (US);

Bernd Keller, Goleta, CA (US);

James Ibbetson, Goleta, CA (US);

Brian Thibeault, Santa Barbara, CA (US);

Eric J. Tarsa, Goleta, CA (US);

Assignee:

Cree, Inc., Durham, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Light emitting diodes include a substrate having first and second opposing faces and that is transparent to optical radiation in a predetermined wavelength range and that is patterned to define, in cross-section, a plurality of pedestals that extend into the substrate from the first face towards the second face. A diode region on the second face is configured to emit light in the predetermined wavelength range, into the substrate upon application of voltage across the diode region. A mounting support on the diode region, opposite the substrate is configured to support the diode region, such that the light that is emitted from the diode region into the substrate, is emitted from the first face upon application of voltage across the diode region. The first face of the substrate may include therein a plurality of grooves that define the plurality of triangular pedestals in the substrate. The grooves may include tapered sidewalls and/or a beveled floor. The first face of the substrate also may include therein an array of via holes. The via holes may include tapered sidewalls and/or a floor.


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