The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2006

Filed:

Jan. 13, 2004
Applicant:

Mikio Shimizu, Higashiibaraki, JP;

Inventor:

Mikio Shimizu, Higashiibaraki, JP;

Assignee:

Trecenti Technologies, Inc., Hitachinaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/477 (2006.01);
U.S. Cl.
CPC ...
Abstract

A technique capable of preventing breakage of a semiconductor wafer in a single-wafer RTP apparatus is provided. Open-loop control is made in a temperature rising process, in which the temperature of the semiconductor wafer is 500° C. or lower, and a revolution speed of the semiconductor wafer is relatively reduced to 100 rpm or lower even if the bowing of the semiconductor wafer occurs. Therefore, a centrifugal force exerted on the semiconductor wafer is reduced, whereby it becomes possible to prevent the semiconductor wafer from dropping from a stage of the single-wafer RTP apparatus. Additionally, closed-loop control is made in the temperature rising process, in which the temperature of the semiconductor wafer is higher than 500° C., and in a main treatment process, and further the revolution speed of the semiconductor wafer is relatively increased. By so doing, the almost uniform in-plane temperature of the semiconductor wafer can be achieved and the bowing of the semiconductor wafer can be prevented.


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