The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2006

Filed:

Feb. 26, 2003
Applicants:

Huikai Xie, Gainesville, FL (US);

Gary K. Fedder, Turtle Creek, PA (US);

Zhiyu Pan, Mountain View, CA (US);

Wilhelm Frey, Mountain View, CA (US);

Inventors:

Huikai Xie, Gainesville, FL (US);

Gary K. Fedder, Turtle Creek, PA (US);

Zhiyu Pan, Mountain View, CA (US);

Wilhelm Frey, Mountain View, CA (US);

Assignee:

Carnegie Mellon University, Pittsburgh, PA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods of fabricating micromachined devices are disclosed, as are micromachined (MEMS) devices fabricated using such methods. According to one embodiment, the method includes forming a composite thin film layer stack on a substrate such that composite thin film layer stack comprises a plurality of etch-resistant layers, directionally etching a first portion of the composite thin film layer stack selectively masked by a first etch-resistant layer thereof, and directionally etching a first portion of the substrate selectively masked by the first etch-resistant layer. These steps may result in the formation of a composite thin film microstructure. The method further includes isotropically etching a second portion of the substrate for a controlled period of time to remove substrate material from under the composite thin film microstructure, removing a portion of the first etch-resistant layer and directionally etching a second portion of the composite thin film layer stack selectively masked by a second etch-resistant layer, and directionally etching a third portion of the substrate selectively masked by the second etch-resistant layer to define a second microstructure, the second microstructure comprising a composite thin film layer stack portion and a substrate layer portion. The method may include backside etching the substrate prior to directionally etching the first portion of the composite thin film layer stack and/or removing the composite thin film layer stack portion from the second microstructure after directionally etching the third portion of the substrate. The composite thin film layer stack may include a CMOS circuitry layer stack and the substrate may include single-crystal silicon (SCS).


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