The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2006

Filed:

Jan. 05, 2004
Applicants:

Yoshitaka Mano, Kyoto, JP;

George Nakane, Nara, JP;

Inventors:

Yoshitaka Mano, Kyoto, JP;

George Nakane, Nara, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 3/08 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor memory device includes a voltage reduction circuit which reduces a power supply voltage and outputs an internal voltage, a nonvolatile memory connected to the internal voltage and a current consumption control circuit including a switch transistor and a resistor. In this case, the amount of electric current which the nonvolatile memory consumes and the amount of electric current which the resistor consumes are substantially the same. When the nonvolatile memory is in a non-operation state, the current consumption control circuit turns ON the switch transistor by a memory activation signal and consumes substantially the same amount of electric current as the amount of electric current which the nonvolatile memory consumes. When the nonvolatile memory is in an operation state, the current consumption control circuit turns OFF the switch transistor and stops electric current consumption by the resistor.


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