The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2006

Filed:

Aug. 07, 2002
Applicants:

William B. Shearon, Findlay, OH (US);

Paul K. Sferrazza, Somerville, NJ (US);

Inventors:

William B. Shearon, Findlay, OH (US);

Paul K. Sferrazza, Somerville, NJ (US);

Assignee:

Intersil Americas Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 3/158 (2006.01);
U.S. Cl.
CPC ...
Abstract

A cascaded DC-DC converter architecture has an upstream converter stage and a downstream converter stage, which derives its input voltage from the upstream stage. Cascading the two converter stages enables functionality of control and monitoring (including soft start and overcurrent detection) circuitry of the upstream stage to be used for the downstream stage, to reduce chip area, cost, and complexity. A voltage window regulator in the downstream converter ensures that, during shutdown, its output voltage will be maintained within a prescribed window of its regulated output voltage, so that no soft start delay is needed when the second converter stage is turned back on.


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