The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 28, 2006
Filed:
Mar. 24, 2004
Joe W. Zhao, San Jose, CA (US);
Xiao-yu LI, Palo Alto, CA (US);
Feng Wang, San Jose, CA (US);
Zhi-min Ling, Cupertino, CA (US);
Joe W. Zhao, San Jose, CA (US);
Xiao-Yu Li, Palo Alto, CA (US);
Feng Wang, San Jose, CA (US);
Zhi-Min Ling, Cupertino, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
Methods for monitoring and improving the fabrication process of integrated circuits using configurable devices are described. In one aspect, the method includes instantiating a test pattern on one or more configurable devices fabricated using the fabrication process, identifying an underperforming region of the configurable devices, and determining if the underperforming region is layout sensitive. At least one of the fabrication process and the layout of the configurable device can then be adjusted based on the determination. In some embodiments, the configurable device may be a programmable logic device, such as a field programmable logic array.