The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 28, 2006
Filed:
Jun. 02, 2003
Richard D. Schinella, Saratoga, CA (US);
Richard D. Schinella, Saratoga, CA (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A method of performing a characterization of an integrated circuit design that is customized during succeeding fabrication steps. The characterization is accomplished with respect to different levels of a processing parameter that is fixed during preceding fabrication steps. A wafer is processed through the preceding fabrication steps, including processing the wafer at at least one of the preceding fabrication steps using processing that produces the different levels of the processing parameter within different integrated circuits on the wafer. This produces a standardized characterization wafer. The standardized characterization wafer is processed through the succeeding fabrication steps using customized processing to produce a customized characterization wafer. The integrated circuits on the customized characterization wafer are tested to determine which of the different levels of the processing parameter produces integrated circuits having desired characteristics.