The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 28, 2006
Filed:
Feb. 26, 2001
Andrew Brookfield Swaine, Welwyn Garden, GB;
Conrado Blasco Allué, Cherry Hinton, GB;
Ian Victor Devereux, Fulbourn, GB;
David James Williamson, Austin, TX (US);
Anthony Neil Berent, Stapleford, GB;
Andrew Brookfield Swaine, Welwyn Garden, GB;
Conrado Blasco Allué, Cherry Hinton, GB;
Ian Victor Devereux, Fulbourn, GB;
David James Williamson, Austin, TX (US);
Anthony Neil Berent, Stapleford, GB;
ARM Limited, Cambridge, GB;
Abstract
The present invention provides an apparatus and method for facilitating debugging of sequences of processing instructions. The apparatus comprises a processing circuit for executing processing instructions, the processing circuit having multiple states of operation, with each state of operation being assigned a context identifier to identify the state of operation. Further, logic is provided for facilitating debugging of sequences of processing instructions executed by the processing circuit. The logic comprises control logic, responsive to control parameters, to perform predetermined actions to facilitate debugging, and triggering logic for generating the control parameters dependent on data received from the processing circuit indicative of the processing being performed by the processing circuit. The triggering logic comprises at least one context identifier comparator for comparing a context identifier provided within the data received from the processing circuit with a predetermined context identifier, and to generate a signal indicating whether that context identifier matches the predetermined context identifier. By this approach, the present invention enables a data processing apparatus to be provided with tracing mechanisms and/or debugging mechanisms which can reliably operate even in situations where the sequences of processing instructions from different states of operation occupy overlapping regions in the memory's address space.