The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 28, 2006

Filed:

Sep. 20, 2004
Applicant:

David J. Megaw, Tucson, AZ (US);

Inventor:

David J. Megaw, Tucson, AZ (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01);
U.S. Cl.
CPC ...
Abstract

A circuit for providing a self-stabilizing, differential load circuit with well controlled impedance to an amplifier is described. According to one embodiment, two pairs of transistors in a cross-coupled configuration and a degeneration resistor for each transistor provide the self-stabilizing, differential load. Small signal analysis of the circuit illustrates an impedance of the load circuit to be substantially equal to a combination of resistor values with substantially little dependence on transconductances and incremental resistances of the transistors. By employing well matched resistors, impedance of the load to the amplifier may be well controlled, and common mode feedback loops avoided, because a current source is not employed as a load. Furthermore, due to use of transistors, a low voltage headroom may be increased and an integrated circuit area decreased.


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