The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 2006

Filed:

May. 10, 2004
Applicants:

Richard W. Reeves, Westboro, MA (US);

Ross V. LA Fetra, Sunnyvale, CA (US);

Paul C. Miranda, Austin, TX (US);

Inventors:

Richard W. Reeves, Westboro, MA (US);

Ross V. La Fetra, Sunnyvale, CA (US);

Paul C. Miranda, Austin, TX (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 5/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A host is coupled to a serially connected chain of memory modules. In one embodiment, a method for initializing the host and each of memory modules includes the host transmitting a first synchronization pattern and a second synchronization pattern downstream in response to a reset condition. The method also includes each memory module in the serially connected chain of memory modules receiving and forwarding the first and the second synchronization pattern. Each memory module receives and forwards the first and the second synchronization pattern. Further, the method includes the host transmitting a plurality of NOP packets downstream in response to transmitting the second synchronization pattern. Lastly, the method includes a portion of the memory modules injecting and transmitting NOP packets upstream in response to receiving the second synchronization pattern from downstream.


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