The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 2006

Filed:

Jan. 06, 2005
Applicants:

Takeshi Yoshida, Hiroshima, JP;

Atsushi Iwata, Hiroshima, JP;

Mamoru Sasaki, Hiroshima, JP;

Miho Akagi, Kanagawa, JP;

Kunihiko Goto, Kanagawa, JP;

Inventors:

Takeshi Yoshida, Hiroshima, JP;

Atsushi Iwata, Hiroshima, JP;

Mamoru Sasaki, Hiroshima, JP;

Miho Akagi, Kanagawa, JP;

Kunihiko Goto, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a sampling and holding, a control logic circuit connects another end of each capacitor of a DA converter to a ground potential, and outputs a sampled input analog signal from a switched amplifier to one end of a hold capacitor to hold. In a successive approximation, it controls a switched amplifier to set an output terminal thereof to a high-impedance state and the hold capacitor to connect the one end thereof to the ground potential. Then, it switches over connection of another end of each capacitor from the ground potential to a power supply voltage based on a digital value held by a successive approximation register to output an output voltage from another end of the hold capacitor to a comparator, and compares the output voltage from another end thereof with an intermediate reference voltage to obtain a digital value from the successive approximation register.


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