The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 21, 2006
Filed:
May. 06, 2004
Steve A. Martinez, Tucson, AZ (US);
Paul D. Ranucci, Tucson, AZ (US);
David J. Megaw, Tucson, AZ (US);
Steve A. Martinez, Tucson, AZ (US);
Paul D. Ranucci, Tucson, AZ (US);
David J. Megaw, Tucson, AZ (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A biasing circuit is arranged to provide relatively well controlled startup and steady state behavior for a reference circuit such as noise immunity and reduced dependence on supplies. The biasing circuit initially employs an independent bias current for biasing the reference circuit at startup until a large enough bootstrapped (output voltage referenced) bias current can be generated that can take over the subsequent biasing of the circuit in the steady state. In one embodiment, a Power On Reset (POR) signal can be generated during the transition from an initial biasing of the reference circuit by the independent bias current to a subsequent steady state biasing provided by the bootstrapped bias current. Also, the assertion of the POR signal can be employed to turn off the transistors providing the independent bias current.