The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 2006

Filed:

Jun. 10, 2004
Applicants:

Farhood Moraveji, Saratoga, CA (US);

Behzad Mohtashemi, San Jose, CA (US);

Inventors:

Farhood Moraveji, Saratoga, CA (US);

Behzad Mohtashemi, San Jose, CA (US);

Assignee:

Micrel, Incorporated, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/569 (2006.01);
U.S. Cl.
CPC ...
Abstract

A field effect transistor (FET) driver circuit includes an error amplifier for providing a FET control signal and a current limiting amplifier for preventing excessive current flow through the FET. The current limiting amplifier generates an overcurrent signal when an excessive current is detected. In response to the overcurrent signal, a voltage control circuit adjusts the voltage at the output of the error amplifier to turn off the FET. Meanwhile, a pulldown circuit at an input of the error amplifier adjusts the voltage provided to that input to cause the error amplifier to provide an output voltage that also tends to turn off the FET. If a buffer is present at that input to the error amplifier, a second pulldown circuit is placed at the input to the buffer to maintain a stable unity gain across the buffer.


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