The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7015092 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 21, 2006

Filed:

Dec. 18, 2003
Applicants:

Venkatachalam C. Jaiprakash, Fremont, CA (US);

Norbert Arnold, Essex, VT (US);

Inventors:

Venkatachalam C. Jaiprakash, Fremont, CA (US);

Norbert Arnold, Essex, VT (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8242 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods and devices that provide improved isolation and alignment of gate conductors or gate contacts of vertical transistors in deep trench memory cells. A method for forming a vertical gate contact of a vertical transistor includes an oxide spacer formation process that prevents defects, such as shorts caused by voids filled with polysilicon, resulting from etching processes that are performed during fabrication of a vertical transistor, and enables formation of well-defined contact plugs for gate contacts, providing improved alignment structures.


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