The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7013401 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 14, 2006

Filed:

Sep. 05, 2002
Applicants:

Shiro Shimizu, Ibaraki, JP;

Tsuyoshi Takayama, Otsu, JP;

Hiroshi Yasuda, Hirakata, JP;

Inventors:

Shiro Shimizu, Ibaraki, JP;

Tsuyoshi Takayama, Otsu, JP;

Hiroshi Yasuda, Hirakata, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/26 (2006.01); G06F 1/32 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a clock control type processor which can permit and accommodate a temporary delay in a processing operation also in a system in which processing times are not constant, and realize the accommodation while reducing the power consumption as much as possible. In this clock control type processor, a block difference detection circuitdetects a difference between a processing block address and a writing block address and outputs a block difference signal, and a clock control circuitcontrols a clock.


Find Patent Forward Citations

Shimizu, Shiro. (2006). Processor capable of preventing sleep/hold state based on a difference between a processing block address and a writing block address (U.S. Patent No. 7013401). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7013401

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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