The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 07, 2006
Filed:
Sep. 03, 2003
Nital S. Patel, Plano, TX (US);
Rajesh Tiwari, Plano, TX (US);
Nital S. Patel, Plano, TX (US);
Rajesh Tiwari, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
The present invention defines a system () for selectively controlling post-CMP dishing effects occurring in semiconductor wafers having copper metallization. The system has a CMP system () that performs copper overpolish and barrier polish on a copper-based semiconductor wafer (). A profilometer () measures actual dishing occurring in the copper metallization after polishing. An input data set () includes a dishing target for the semiconductor wafer. A data integrity function () evaluates the profilometer's measurement, and generates an indicator of the reliability of the measurement. A modeling function () receives the measurement, the indicator, and the dishing target, and evaluates any differential between the dishing target and actual dishing. The modeling function generates a processing target to eliminate the differential, and modifies this process responsive to the indicator. A processing control function () receives the processing target, and alters the copper overpolish or barrier polish responsive to the processing target.