Systems and methods for holdover circuits in phase locked loops

Abstract

Improved phase locked loops are described which handle momentary breaks in an input communication channel. The phase locked loops provide the capability to 'hold' the output clock in a communication system at or very near the last output frequency before the loss of input data. Such phase locked loops include a differential phase detector, an electronic selector circuit, and an operational amplifier based loop filter circuit. The electronic selector circuit provides the differential output of the phase detector at a pair of inputs to the operational amplifier. A voltage controlled oscillator is coupled to an output of the operational amplifier and provides an output frequency for the phased locked loop circuit. The electronic selector circuit is operable to control the input to the operational amplifier to hold an output frequency of the voltage controlled oscillator at a substantially constant frequency.