The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2006

Filed:

Dec. 01, 2003
Applicants:

Grit Schwalbe, Dresden, DE;

Kae-horng Wang, Dresden, DE;

Klaus Feldner, Dresden, DE;

Elard Stein Von Kamienski, Dresden, DE;

Inventors:

Grit Schwalbe, Dresden, DE;

Kae-Horng Wang, Dresden, DE;

Klaus Feldner, Dresden, DE;

Elard Stein Von Kamienski, Dresden, DE;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8236 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for providing bitline contacts in a memory cell array includes a plurality of bitlines disposed in a first direction, the bitlines being covered by an isolating layer, a plurality of wordlines disposed in a second direction perpendicular to the first direction above the bitlines, and memory cells disposed at the points at which the bitlines and wordlines cross each other. According to a first aspect of the present invention, the isolating layer is removed from the bitlines at the portions that are not covered by the wordlines, whereas the areas between the bitlines remain unaffected. Alternatively, the isolating layer is removed from the whole cell array. Then, an electrical conductive material is provided on the exposed portions of the bitlines. The method is used to provide bitline contacts in a nitride read only memory (NROM™) chip.


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