The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2006

Filed:

Aug. 18, 2003
Applicants:

Takumi Mikawa, Ootsu, JP;

Yuuji Jyuudai, Uji, JP;

Shinya Natsume, Takatsuki, JP;

Inventors:

Takumi Mikawa, Ootsu, JP;

Yuuji Jyuudai, Uji, JP;

Shinya Natsume, Takatsuki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8242 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for manufacturing a semiconductor device includes the steps of forming a conductive layer over a first insulating layer formed on a substrate, and over a plurality of contact plugs formed in the first insulating layer; forming a plurality of capacitor element lower electrodes by patterning the conductive layer; forming a second insulating layer on the first insulating layer and the capacitor element lower electrodes; forming recesses in the second insulating layer at a region above the capacitor element lower electrodes; planarizing the second insulating layer by polishing; exposing the capacitor element lower electrodes; and forming a capacitive insulating film and capacitor element upper electrodes above the capacitor element lower electrodes. In polishing the second insulating layer, leveling of steps can be accelerated, insufficient polishing, peeling of the lower electrodes and generation of scratches can be suppressed, and the global step difference can be reduced.


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