The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 2006

Filed:

Jan. 16, 2004
Applicants:

Scott T. Becker, Darien, IL (US);

Brian Reed, Cupertino, CA (US);

Puneet Sawhney, San Jose, CA (US);

Jayanth Thyamagundlam, Milpitas, CA (US);

Inventors:

Scott T. Becker, Darien, IL (US);

Brian Reed, Cupertino, CA (US);

Puneet Sawhney, San Jose, CA (US);

Jayanth Thyamagundlam, Milpitas, CA (US);

Assignee:

ARM Physical IP, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 17/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

An invention is provided for a feed forward circuit that reduces delay through an inverting circuit. The feed forward circuit includes an inverter having an input and an output, and an inverting circuit having an input and an output. The input of the inverting circuit is coupled to the output of the inverter. A feed forward transistor having a gate coupled to the input of the inverter and a terminal coupled to the output of the inverting circuit also is included. In operation the feed forward transistor decreases the amount of time required for the output of the inverting circuit to change state. In sum, the invention reduces the delay when the inverting circuit transitions to a high state, without affecting the timing of the transition to a low state.


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