The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 28, 2006
Filed:
Jul. 18, 2000
William C. Athas, San Jose, CA (US);
Nestor Tzartzanis, Belmont, CA (US);
Weihua Mao, San Jose, CA (US);
Lena Peterson, Gothenburg, SE;
William C. Athas, San Jose, CA (US);
Nestor Tzartzanis, Belmont, CA (US);
Weihua Mao, San Jose, CA (US);
Lena Peterson, Gothenburg, SE;
University of Southern California, Los Angeles, CA (US);
Abstract
High performance clock-powered logic runs at below supply levels and reduces the need for faster digital logic circuitry. In a preferred embodiment, a clocked buffer () is used to drive the signal line. The receiving end of the line is connected to a jam latch (), preferably followed by an n-latch (), followed by the digital logic (), and followed by a second n-latch (). The first n-latch is eliminated in an alternative embodiment, preferably one that uses complementary data signals.