The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 2006

Filed:

Jul. 09, 2004
Applicants:

Andrew John Sowden, Cambridge, GB;

Dipesh Ishwerbhai Patel, Saffron Walden, GB;

Nicholas Andrew Salter, Cambridge, GB;

Harry Edward Oldham, Cambridge, GB;

Inventors:

Andrew John Sowden, Cambridge, GB;

Dipesh Ishwerbhai Patel, Saffron Walden, GB;

Nicholas Andrew Salter, Cambridge, GB;

Harry Edward Oldham, Cambridge, GB;

Assignee:

ARM Limited, Cambridge, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0175 (2006.01);
U.S. Cl.
CPC ...
Abstract

A data processing apparatus and method are provided for controlling level shifting. The data processing apparatus comprises a first component provided within a first voltage domain and operable to receive a first supply voltage, and a second component provided within a second voltage domain and operable to receive a second supply voltage. At least one of the first and second supply voltages are dynamically variable. The data processing apparatus further comprises an interface cell between the first and second voltage domains which is operable to receive a signal issued by the first component in the first voltage domain and destined for the second component. The interface cell comprises level shifting logic operable to convert the signal issued by the first component into a corresponding signal to be propagated to the second component in the second voltage domain. Further, bypass logic is provided which is operable in the event that the first supply voltage and second supply voltage are at the same voltage level to enable a bypass path around the level shifting logic such that the signal issued by the first component is propagated via the bypass path as the corresponding signal to the second component in the second voltage domain.


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