The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 21, 2006
Filed:
Nov. 12, 2002
R. Dean Adams, St. George, VT (US);
Thomas J. Eckenrode, Endicott, NY (US);
Steven L. Gregor, Endicott, NY (US);
Garrett S. Koch, Jeffersonville, VT (US);
R. Dean Adams, St. George, VT (US);
Thomas J. Eckenrode, Endicott, NY (US);
Steven L. Gregor, Endicott, NY (US);
Garrett S. Koch, Jeffersonville, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A system and methodology for testing memory in an integrated circuit implementing BIST testing to calculate row and column redundancy and enable replacement of a defective row or column of memory cells. The system comprises circuitry for detecting a first single memory cell failure in a row; and, recording the I/O value of the first Single Cell Fail (SCF). A circuit is provided for detecting whether more than one single cell failure has occurred for a tested row, and, in response to detecting a second SCF, comparing recorded I/O value of the subsequent tested row, with the I/O value associated with the first failed memory cell. Upon detection of defective bits, the defective column and row of memory having corresponding defective bits set is replaced.